Optimize "Software-SPI-Slave-Mode" ISR

hello all,

i have written isr receive data arduino. aware of fact atmega328 can perform hardware, exploring possibility save hardware pins used in master mode. till here code works (on receiving end) spi_clock_div32 (on sending end), if switch spi_clock_div16 start miss bits. open tips optimize code see if can work spi_clock_div16.

cheers,

jack

receiving end:

code: [select]


volatile byte flag = 0;

void setup()
{
  serial.begin(9600);
  attachinterrupt (0, _isrd2, falling);  // attach interrupt handler
  pinmode(2, input); // ss
  pinmode(5, input); // sck
  pinmode(6, input); // di
}

void loop()
{
  if (flag)
  {
    serial.println(flag,bin);
    flag = 0;
  }
}

void _isrd2()
{
  byte rec = 0;
  byte bn = 1;
  byte pd = 1;
  byte p = 0;
 
  p = pind;
   
  while (~p & b00000100)      // long pin pd2 low (ss low)
  {
    if ( p & b00100000 )      // if clock pin (pd5) high
    {
      if (pd)                 // if high pulse on clock has not been processed
      {
        pd = 0;               // flag processed
        if (p & b01000000)    // if data in pin (pd6) high
        {
          rec += bn;          // add bit received byte
        }
        bn = bn << 1;         // shift next bit receive
      }
    }
    else
    {
      pd = 1;                 // if clock low again, can process next clock high pulse
    }
    p = pind;                 // read value of d-register
  }
 
  flag = rec;                 // set flag value received byte
}


sending end:

code: [select]


#include <spi.h>

/** nop tune soft spi timing */
#define nop asm volatile ("nop\n\t")

void setup()
{
  serial.begin(9600);

  pinmode( 2, output);   // still using ss
  digitalwrite(2, high);

  pinmode(10, output);
  digitalwrite(10, high);
  spi.begin();
  spi.setclockdivider(spi_clock_div32);
}

void loop()
{
  byte snd = b10111101;

  portd = portd & b11111011; // pull pd2 low
  delay(1);                  // delay depends on spiclockdivider
  spi.transfer(snd);
  portd = portd | b00000100;

  delay(500);  // repeat after 0.5 sec
}


for readability should give  b00000100 , others meaningful name

the while (~p & b00000100)      // long pin pd2 low (ss low) can keep on going  creating long interrupt until sender site sets ss high.

if system interrupt every bit not need while loop @ (would better.

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